Zaccaria/Associated Leisure MVGS Neptune Maintenance 2022
02/06/2022 - Northwest Pinball and Arcade Show (2022)
The game ran OK through most of Thursday but eventually stopped booting. A spare game
PCB was swapped in that continued running OK for the remainder of the show.
04/07/2022 - Game PCB #PA20200226 repair
Jumping straight in the with the Arduino ICT found:
- CPU A - ROM - OK
- CPU A - RAM - "E: PR d800 90 f5"
Further RAM testing on both CPU A and B sides found that no RAM was reliably accessible. The
"RAM Check" and "RAM Write All AD" both produced a consistent display on screen that suggested
the RAM write operation was generally reliable and the RAM read operation was unreliable.
During initial fault finding the character display became briefly flashing intermittent and
then was lost entirely, leaving a blank screen. "RAM Write All" had no effect on the display
and RAM read had changed from unreliable to returning no valid data at all :( The new failure
syndrome was confirmed with the Z80 CPUs reinstalled.
There were no known schematics for this PCB set with the closest being a poor scan of the
older game Marvins Maze that provided a rough guide to how the two CPUs are connected up
to the shared memory space. Each fault-finding step ended up as two parts - tracing
the relevant portion to build the schematic and then using the scope with Arduino ICT to
inspect the signals.
The buffers & latches on the CPU PCB along with Marvins Maze schematics and measuring
with the scope during Arduino ICT RAM operations identified the common address bus leaving
the video PCB as a 12-bit bus present at unpopulated resistor arrays RA1 & RA2. The common
data bus was present at RA3.
After a "RAM Write All AD" to write data == address the RAM on the video PCB was inspected with the scope:
- H2 (6116) data bus - idle hi
- H3 (6116) data bus - idle hi
- H5 (6116) data bus - idle hi
- H6 (6116) data bus - idle hi
- B1 (6116) data bus - active
- H12 (6264) data bus - active
In all cases the address bus was active. Active data and ~WE Write Enable as also seen
during a RAM writes. Various individual RAM tests revealed that the ~WE input of all the
RAMs were common, so chip select alone was gating access to specific RAMs. Checking RAM
write state on IC H2 found:
- RAM Write All Hi - leaves data bus idle high
- RAM Write All Lo - leaves data bus idle low
- RAM Write All AD - leaves data bus idle low
Checking IC H2 (6116):
Pin 1 - A7 | idle lo | | | Pin 24 - Vcc | idle hi |
Pin 2 - A6 | idle lo | | | Pin 23 - A8 | idle lo |
Pin 3 - A5 | active | | | Pin 22 - A9 | idle lo |
Pin 4 - A4 | active | | | Pin 21 - ~WE | idle hi |
Pin 5 - A3 | active | | | Pin 20 - ~OE | idle lo |
Pin 6 - A2 | active | | | Pin 19 - A10 | idle lo |
Pin 7 - A1 | active | | | Pin 18 - ~CE | active |
It appeared as if only 6 address bits were active for video display. Check IC C6 pin 8
(~MREQ) measured a 1.25uS pulse. Using ~WE as a trigger and dual scope channels found that
~CE is not always active with ~WE. To continue working this path would have required tracing
the schematic for the RAM ~CE circuit.
At this point I realized that the new failure syndrome may be easier to trace - why was
there no video display? The power on state of the RAM did provide at some active data bus
bits on IC H2 to work with. Checking IC H8 (27256):
- Pin 1 - Vpp - idle hi
- Pin 2 - A12 - idle hi
- Pin 3 - A7 - idle hi
- Pin 4 - A6 - idle hi
- Pin 5 - A5 - idle hi
- Pin 6 - A4 - active
- Pin 7 - A3 - active
- Pin 8 - A2 - active
- Pin 9 - A1 - active
- Pin 10 - A0 - active
The upper address bits being idle on the graphics EPROMs suggested the video RAM data
output wasn't connecting through to select characters in the graphics ROMS. I began to
work through tracing the schematic for IC H2 data bus. Active data was present on IC
G3 (LS273) pin 7 input but corresponding output pin 6 was idle high. Checking the latch input
on IC G3 pin 11 found it idle high - data was not being latched through to the output.
Working back to IC C2 (LS367) pin 5 output was high as was input pin 4. The enable pin
1 was idle low and thus enabled. Working back again to IC B15 (PAL16R8) pin 16, whilst
checking IC B15, touching pin 8 with the scope lead caused the video display to re-appear
and the scope revealed that pin 8 was floating with noise. I was really hoping that
this was an input to the PAL rather than the PAL being bad :( Tracing the signal schematic
found pin 8 connected to output pin 13 of IC A15 (LS194). The rest of A15 outputs all looked
OK on the scope. Replacing IC A15 (LS194) fixed the RAM test, and the game booted and
played OK. Not having schematics made this repair a slog taking several hours.
The schematic notes were captured for future use.
28/03/2023 - Monitor chassis #015 repair
Pre-show testing found a intermittently vertical rolling picture and the vertical sync pot
was adjusted all the way to one side as the closest lock. The chassis was removed and setup
on the bench where it also had vertical roll. Checking TR1 (BC237) output on a scope didn't
reveal any issue (a common failure point). The vertical sync pot RV15 (220K) track measured
860K in circuit, suggesting it was bad. Removing RV15 and measuring out of circuit found
the resistance between all pins around 1M to 2M confirming it was bad. After replacing
it the vertical lock point was approximately pot centre and the chassis was declared fixed.
30/03/2023 - Game PCB PA20200226 repair
Pre-show testing found the game PCB not booting with a "CPU B ROM 2 ERROR" self-test
failure. The game PCB was removed for repair.
Which ROM was ROM2? Removing IC D1 (27128, P6) didn't change the error. Removing IC D2
(27128, P5) resulted in a ROM 1 error. After reinstalling the all the ROMs back into the PCB,
the PCB reported a ROM 0 error and crashed. Checking the pins found IC D1 and D2 pins corroded
and after a cleaning the game ran reliably.
Whilst the game PCB now booted and played OK, there was still a minor sprite
graphics corruption issue that was left as is.
The repaired monitor chassis and game PCB were fitted back into the cabinet and tested OK.
MVGS Neptune Maintenance 2023
prswan@gmail.com